003 : Sample and Hold Circuit Design for Demodulation

This project aims to design a sample and hold circuit to be used as a demodulator. The circuit samples the given sinusoidal signal at the positive peaks and holds the sample until the next cycle. The switch does the sampling consisting of 2 MOSFETS, and the capacitor handles the hold operation. As for the design specifications, it is given that an external IC, or microcontroller, can generate the Vcontrol, the buffer has to be realized with transistors, and only +-10V is given as a power source. The project is made possible with my teammate Busenaz Kerimgil.

Demodulation at 5Hz

Frequency vs Output Voltage